hashbrown/control/group/
mod.rs

1// TESTING NOTE:
2//
3// Because this module uses `cfg(..)` to select an implementation, it will not
4// be linted without being run on targets that actually load each of these
5// modules. Be sure to edit `ci/tools.sh` to add in the necessary cfgs if you
6// change these, so that your implementation gets properly linted.
7
8cfg_if! {
9    // Use the SSE2 implementation if possible: it allows us to scan 16 buckets
10    // at once instead of 8. We don't bother with AVX since it would require
11    // runtime dispatch and wouldn't gain us much anyways: the probability of
12    // finding a match drops off drastically after the first few buckets.
13    //
14    // I attempted an implementation on ARM using NEON instructions, but it
15    // turns out that most NEON instructions have multi-cycle latency, which in
16    // the end outweighs any gains over the generic implementation.
17    if #[cfg(all(
18        target_feature = "sse2",
19        any(target_arch = "x86", target_arch = "x86_64"),
20        not(miri),
21    ))] {
22        mod sse2;
23        use sse2 as imp;
24    } else if #[cfg(all(
25        target_arch = "aarch64",
26        target_feature = "neon",
27        // NEON intrinsics are currently broken on big-endian targets.
28        // See https://github.com/rust-lang/stdarch/issues/1484.
29        target_endian = "little",
30        not(miri),
31    ))] {
32        mod neon;
33        use neon as imp;
34    } else if #[cfg(all(
35        feature = "nightly",
36        target_arch = "loongarch64",
37        target_feature = "lsx",
38        not(miri),
39    ))] {
40        mod lsx;
41        use lsx as imp;
42    } else {
43        mod generic;
44        use generic as imp;
45    }
46}
47pub(crate) use self::imp::Group;
48pub(super) use self::imp::{BITMASK_ITER_MASK, BITMASK_STRIDE, BitMaskWord, NonZeroBitMaskWord};
hashbrown/control/group/mod.rs

hashbrown/control/group/
mod.rs
