Struct wgpu_core::binding_model::BindGroupLayout

pub struct BindGroupLayout<A: Api> {
    pub(crate) raw: A::BindGroupLayout,
    pub(crate) device_id: Stored<DeviceId>,
    pub(crate) multi_ref_count: MultiRefCount,
    pub(crate) entries: HashMap<u32, BindGroupLayoutEntry, BuildHasherDefault<FxHasher>>,
    pub(crate) dynamic_count: usize,
    pub(crate) count_validator: BindingTypeMaxCountValidator,
    pub(crate) label: String,
}

Bind group layout.

The lifetime of BGLs is a bit special. They are only referenced on CPU without considering GPU operations. And on CPU they get manual inc-refs and dec-refs. In particular, the following objects depend on them:

• produced bind groups
• produced pipeline layouts
• pipelines with implicit layouts

Fields

raw: A::BindGroupLayout

device_id: Stored<DeviceId>

multi_ref_count: MultiRefCount

entries: HashMap<u32, BindGroupLayoutEntry, BuildHasherDefault<FxHasher>>

dynamic_count: usize

count_validator: BindingTypeMaxCountValidator

label: String

Trait Implementations

impl<A: Debug + Api> Debug for BindGroupLayout<A>where
    A::BindGroupLayout: Debug,

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<A: Api> Resource for BindGroupLayout<A>

const TYPE: &'static str = "BindGroupLayout"

fn life_guard(&self) -> &LifeGuard

fn label(&self) -> &str

impl<A: HalApi> Access<BindGroup<A>> for BindGroupLayout<A>

impl<A: HalApi> Access<BindGroupLayout<A>> for Device<A>

impl<A: HalApi> Access<BindGroupLayout<A>> for PipelineLayout<A>

impl<A: HalApi> Access<BindGroupLayout<A>> for Root

impl<A: HalApi> Access<Buffer<A>> for BindGroupLayout<A>

impl<A: HalApi> Access<ShaderModule<A>> for BindGroupLayout<A>