[][src]Module ppv_lite86::types::types

Vector type naming scheme: uN[xP]xL Unsigned; N-bit words * P bits per lane * L lanes

A lane is always 128-bits, chosen because common SIMD architectures treat 128-bit units of wide vectors specially (supporting e.g. intra-lane shuffles), and tend to have limited and slow inter-lane operations.

Traits

LaneWords4

A vector composed one or more lanes each composed of four words.

MultiLane

A vector composed of multiple 128-bit lanes.

Swap64

Exchange neigboring ranges of bits of the specified size

UnsafeFrom
VZip

Combine single vectors into a multi-lane vector.

Vec2

A vector composed of two elements, which may be words or themselves vectors.

Vec4

A vector composed of four elements, which may be words or themselves vectors.

Words4

A vector composed of four words; depending on their size, operations may cross lanes.

u128x1
u128x2
u128x4
u32x4
u32x4x2
u32x4x4
u64x2
u64x4
u64x2x2
u64x2x4