Skip to main content

Module word

aes::backends::soft::fixslice

Module word 

Source

Traits§

Word 🔒
Width-abstracted machine word holding one row of a bitsliced AES state.

Functions§

bitslice_swaps 🔒
Width-generic delta-swap pipeline shared by bitslice and inv_bitslice across every Word impl. The same three-pass sequence inverts itself, so bitslice and inv_bitslice invoke it identically.
double_bits 🔒
Expand an 8-bit row pattern to a 16-bit row pattern by doubling each bit: input bit i becomes output bits 2i and 2i+1. Branchless SWAR so LLVM folds it to a single 16-bit immediate when b is a constant.